Port H access and configuration shortcuts
[PORT - Procedure for parallel port usage]

Defines
#define	PPH_HST   *_pph[0]
	Port H Pad Control (Hysteresis) Register. .
#define	PPH_MUX   *_pph[1]
	Multiplexer Control Register.
#define	PPH_FER   *_pph[2]
	Function Enable Registers.
#define	PPH_DIR   *_pph[3]
	Direction Registers.
#define	PPH_INE   *_pph[4]
	Input Enable Registers.
#define	PPH_POL   *_pph[5]
	Polarity Registers.
#define	PPH_EDG   *_pph[6]
	Interrupt Sensitivity Registers.
#define	PPH_RSE   *_pph[7]
	Set on Both Edges Registers.
#define	PPH_MKA   *_pph[8]
	Mask Interrupt A Registers.
#define	PPH_MKB   *_pph[9]
	Mask Interrupt B Registers.
#define	PPH_MSA   *_pph[10]
	Mask Interrupt A Set Registers.
#define	PPH_MSB   *_pph[11]
	Mask Interrupt B Set Registers.
#define	PPH_MCA   *_pph[12]
	Mask Interrupt A Clear Registers.
#define	PPH_MCB   *_pph[13]
	Mask Interrupt B Clear Registers.
#define	PPH_MTA   *_pph[14]
	Mask Interrupt A Toggle Registers.
#define	PPH_MTB   *_pph[15]
	Mask Interrupt B Toggle Registers.
#define	PPH_SET   *_pph[16]
	GPIO Set Registers. Write 1 to set related bit.
#define	PPH_CLR   *_pph[17]
	GPIO Clear Registers. Write 1 to clear related bit.
#define	PPH_TGL   *_pph[18]
	GPIO Toggle Registers. Write 1 to toggle related bit.
#define	PPH   *_pph[19]
	Port H Data Registers.

---

Define Documentation

#define PPH   *_pph[19]

#define PPH_CLR   *_pph[17]

#define PPH_DIR   *_pph[3]

For all bits, 0 - Input, 1 - Output

#define PPH_EDG   *_pph[6]

For all bits, 0 - Level, 1 - Edge

#define PPH_FER   *_pph[2]

For all bits, 0 - GPIO mode, 1 - Enable peripheral function

#define PPH_HST   *_pph[0]

These registers configure hysteresis for the PORTx inputs. For each controlled group of pins, b#0 will disable Schmitt triggering (hysteresis), while b#1 will enable it.

#define PPH_INE   *_pph[4]

For all bits, 0 - Input Buffer Disabled, 1 - Input Buffer Enabled

#define PPH_MCA   *_pph[12]

For all bits, 1 - Clear

#define PPH_MCB   *_pph[13]

For all bits, 1 - Clear

#define PPH_MKA   *_pph[8]

For all bits, 1 - Enable, 0 - Disable

#define PPH_MKB   *_pph[9]

For all bits, 1 - Enable, 0 - Disable

#define PPH_MSA   *_pph[10]

For all bits, 1 - Set

#define PPH_MSB   *_pph[11]

For all bits, 1 - Set

#define PPH_MTA   *_pph[14]

For all bits, 1 - Toggle

#define PPH_MTB   *_pph[15]

For all bits, 1 - Toggle

#define PPH_MUX   *_pph[1]

For all bit fields: 0 = Peripheral function, 1 = Alternate peripheral function

#define PPH_POL   *_pph[5]

For all bits, 0 - Active high or rising edge, 1 - Active low or falling edge

#define PPH_RSE   *_pph[7]

For all bits when enabled for edge-sensitivity, 0 - Single edge, 1 - Both edges

#define PPH_SET   *_pph[16]

#define PPH_TGL   *_pph[18]

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