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FPGA - Procedures for SharkDuino+ FPGA


Files

file  otFPGA.h
 FPGA Library for SharkDuino+.

Defines

#define FPGA_DATA   (*((volatile unsigned char *) 0x20100000))
 FPGA Register data.
#define FPGA_RADD   (*((volatile unsigned char *) 0x20100002))
 FPGA Register address.

Enumerations

enum  FpgaRegisterAddress {
  FPGA_PA, FPGA_PB, FPGA_PC, FPGA_PD,
  FPGA_PE, FPGA_PF, FPGA_PG, FPGA_PH,
  FPGA_PI, FPGA_PK, FPGA_PL, FPGA_PM,
  FPGA_PN, FPGA_PO, FPGA_PP, FPGA_PQ,
  FPGA_PX_DATA, FPGA_PX_DIR, FPGA_PX_FUNL, FPGA_PX_FUNH,
  FPGA_CPL_DATA, FPGA_CPL_DIR, FPGA_CPL_FUNL, FPGA_CPL_FUNH,
  FPGA_CPH_DATA, FPGA_CPH_DIR, FPGA_CPH_FUNL, FPGA_CPH_FUNH,
  FPGA_PR, FPGA_PS, FPGA_PT, FPGA_PU,
  FPGA_PV, FPGA_AUX1, FPGA_AUX2, FPGA_AUX3,
  FPGA_FIFO, FPGA_LB_ADD, FPGA_LB_DATA
}
enum  TimerTimeBase { TTB_1KHZ, TTB_2_5MHZ, TTB_PLLCLK, TTB_25MHZ }
enum  Timers { F_TIMER_0, F_TIMER_1 }
enum  Encoders { ENCODER_0, ENCODER_1, ENCODER_2, ENCODER_3 }
enum  EncoderClock { E_250KHz, E_500KHz, E_2_5MHZ, E_25MHZ }
enum  EncoderZeroEnable { E_0_ZERO = 0x20, E_1_ZERO = 0x40, E_23_ZERO = 0x80 }
enum  EncoderZeroInput { E_0_ZERO_PORTX = 0x01, E_0_ZERO_PCAM = 0x00, E_1_ZERO_PORTX = 0x02, E_1_ZERO_PCAM }
enum  EncoderInput {
  E_0_PCAM = 0x04, E_0_PORTX = 0x00, E_1_PCAM = 0x08, E_1_PORTX = 0x00,
  E_2_PCAM = 0x10, E_2_PORTX = 0x00, E_3_PCAM = 0x20, E_3_PORTX = 0x00
}
enum  EventInput {
  EI_PX_0, EI_PX_1, EI_PX_2, EI_PX_3,
  EI_PX_4, EI_PX_5, EI_PX_6, EI_PX_7,
  EI_PCAM_0, EI_PCAM_1, EI_PCAM_2, EI_PCAM_3,
  EI_PCAM_4, EI_PCAM_5, EI_PCAM_6, EI_PCAM_7
}
enum  EventFunctions { EVF_COUNTER, EVF_FREQUENCY, EVF_PULSEMEASURE }
enum  PortSettings {
  PD_OUTPUT, PD_FUNC_1, PD_FUNC_2, PD_FUNC_3,
  PD_INPUT
}
enum  CameraSocket {
  SOCK_1, SOCK_2, SOCK_3, SOCK_4,
  SOCK_5
}
enum  HiddenPort { HP_STDBY_CTRL = 0x04, HP_STDBY = 0x08, HP_LCD_LED = 0x40, HP_EXT_I2C = 0x10 }
enum  InterruptSignals {
  IS_TOUCH = 1, IS_EXTINT = 2, IS_IMU = 4, IS_TRIGX = 8,
  IS_AUXIN = 16
}

Functions

void FpgaInit ()
 Init the system FPGA. Call this function as first.
void FpgaRegWrite (int reg, U16 val)
 Write a FPGA register.
U16 FpgaRegRead (int reg)
 Read a FPGA register.
void FpgaSetPll (int n, int m, int u, int vco)
 Write registers of the clock synthesizer (PLL) Use FpgaPllConfig instead.
float FpgaPllConfig (int n, int m, int u)
 Clock synthesizer (PLL) configurator. Configure the PLL to set a requested frequency.
Output clock as Mhz = (25 / n * m) / u
Frequency range is 1.5 to 350MHz.
void FpgaSpiSelect (U8 sel)
 Select a chip select for a SPI device.
void FpgaSpiWrite (U8 val)
 Write a byte on the SPI channel reserved on PCAM port.
void FpgaSpiWrite16 (U16 val)
 Write a word on the SPI channel reserved on PCAM port.
void FpgaTimerSet (U8 timer, U8 timeBase, U16 count)
 Set Timer 0/1.
Output frequency 2: timeBase / ((n - 1) * 2). Duty cycle: 50%
Output frequency 1: timeBase / (n - 1). Duty Cycle: asymmetrical.
void FpgaTimerEnable (U8 timer, bool ena)
 Enable Timer 0/1.
.
void FpgaEncoderSetup (U8 signalSource, U8 timeBase, U8 zeroSignals)
 Configure all encoders 3:0.
.
S16 FpgaEncoderRead (U8 encoder)
 Read selected encoder counts.
.
void FpgaEncoderClear (U8 encoder)
 Clear selected encoder counter.
.
void FpgaEventFunction (U8 input, U8 fun, float tb)
 Configure the event counter.
Event counter can be configured as Counter, Frequency meter or Pulse width measurement.
void FpgaEventGate (bool ena)
 Enable the gate of the event counter.
void FpgaEventSignalInvert (bool ena)
 Set the level of the input for the event counter.
void FpgaEventReset ()
 Clear the event counter.
void FpgaEventClearRead ()
 Clear the EVENT DONE flag.
bool FpgaEventDone ()
 Check the EVENT DONE flag.
U32 FpgaEventRead ()
 Read the event read counter.
void FpgaPortPxSet (U8 bit0, U8 bit1, U8 bit2, U8 bit3, U8 bit4, U8 bit5, U8 bit6, U8 bit7)
 Configure the port PX (Y12). Each bit can be configured as bidirectional port or as preset function.
See PortSettings for set of bit and also see PX Port - Signals and functions for all possibilities.
U8 FpgaPxGet ()
 Read the contents of the port signal.
void FpgaPxPut (U8 dat)
 Write a data on the port.
void FpgaPCamlSet (U8 bit0, U8 bit1, U8 bit2, U8 bit3, U8 bit4, U8 bit5, U8 bit6, U8 bit7)
 Configure the port PCAM (Y11) in the range 7:0.
Each bit can be configured as bidirectional port or as preset function.
See PortSettings for set of bit and also see PCAM - Camera port for all possibilities.
U8 FpgaPCamlGet ()
 Read the contents of the port PCAM in the range 7:0.
void FpgaPCamlPut (U8 dat)
 Write a data on the port PCAM in the range 7:0.
void FpgaPCamhSet (U8 bit8, U8 bit9, U8 bit10, U8 bit11, U8 bit12, U8 bit13, U8 bit14, U8 bit15)
 Configure the port PCAM (Y11) in the range 15:8
Each bit can be configured as bidirectional port or as preset function.
See PortSettings for set of bit and also see PCAM - Camera port for all possibilities.
U8 FpgaPCamhGet ()
 Read the contents of the port PCAM in the range 15:8.
void FpgaPCamhPut (U8 dat)
 Write a data on the port PCAM in the range 15:8.
void FpgaSetCamBus (int bus, bool mask10bit)
 Configure the PCAM port a for specific bus of a related camera.
void FpgaSetCamBusWidth (int bus)
 Select a different size of the camera bus.
U8 FpgaIntSource ()
 Identifies the source that generated an interrupt.
void FpgaIntClear ()
 Clear the interrupt request.
void FpgaIntEnable (bool ena)
 Enable/disable interrupt.
void FpgaInterruptSignals (U8 bit, bool invert)
 Invert an interrupt signal level see InterruptSignals.
void FpgaHiddenPort (U8 value, bool ena)
 Enable or disable a bit of the hidden port.
void FpgaSenWrite (U16 add, U16 val)
 Specific function for Tiziano camera. Don't use! Reserved!
void FpgaLocalBusEnable ()
 Enable DSP local bus on Y11 connector. Only with FPGA ver. >= 1.5.
void FpgaLocalBusAddress (U8 add)
 Set the address A[3:0] of the local bus.
void FpgaLocalBusWrite (U8 data)
 Write data on the local bus.
void FpgaLocalBusReadEnable (bool ena)
 Enable/disable local bus direction.
U8 FpgaLocalBusRead ()
 Read data from local bus.

Detailed Description

Functions related to the standard FPGA (FPX-1220) FPGA Library - Version History.
1.0.0 23/01/2020 First release

PCAM - Camera port

 * PCAM port (Y11) signals description
 *
 * Legenda:
 * PCAM: Is the CAMERA port, PCAM[15:8] is controlled by FpgaPCamhSet while PCAM[7:0] by FpgaPCamlSet
 * PF[11:0] Is the PF DSP port, it can be set as in or out
 * FDO[7:0] Is the bus of the output FIFO.
 * ENCx Encoder signals.
 * PPI Image grabber inputs.
 * Signals not documented in the below tabel:
 *  FDI[7:0] Is the bus of the input FIFO. It's connected to PCAM[7:0] input bus.
 *  PCAM[13] Is also the FIFO write enable signal related to FDI[7:0] bus.
 *  PCAM[12] Is also the FIFO write clock signal related to FDI[7:0] bus.
 *
 *  PCAM[13] Is also the FIFO read enable signal related to FDO[7:0] bus.
 *  PCAM[12] Is also the FIFO read clock signal related to FDO[7:0] bus.
 *
 * SIGNAL      PIN  INPUT1  INPUT2  INPUT3  OUTPUT  FUNCTION1   FUNCTION2   FUNCTION3   DESCRIPTION
 * VCC          1                                                                       Camera power supply
 * GND          2                                                                       Power return
 * E_SCL        3                                                                       Extern TWI clock
 * E_SDA        4                                                                       Extern TWI data
 * PCAM[15]     5   PORT    VSYNC           PORT                                        Port or VSYNC
 * PCAM[14]     6   PORT    HSYNC           PORT    PF11                                Port or HSYNC
 * PCAM[13]     7   PORT    PIXCLK          PORT    PF10                                Port or PIXCLK
 * PCAM[12]     8   PORT                    PORT    PLLCLK      25MHZ       TIM1_2      Port or clock source
 * PCAM[11]     9   PORT    PPI[11] ENC3_Z  PORT    SPICLK      FULL_0                  Port,PPI,SPI,FIFO signals
 * PCAM[10]     10  PORT    PPI[10] ENC2_Z  PORT    MOSI        FEMPTY_0                Port,PPI,SPI,FIFO signals
 * PCAM [9]     11  PORT    PPI[9]  ENC1_Z  PORT    PF9                                 Port,PPI signals
 * PCAM [8]     12  PORT    PPI[8]  ENC0_Z  PORT    PF8                                 Port,PPI signals
 * PCAM [7]     13  PORT    PPI[7]  ENC3_B  PORT    PF7         FDO[7]                  Port,PPI,FIFO
 * PCAM [6]     14  PORT    PPI[6]  ENC3_A  PORT    PF6         FDO[6]                  Port,PPI,FIFO
 * PCAM [5]     15  PORT    PPI[5]  ENC2_B  PORT    PF5         FDO[5]                  Port,PPI,FIFO
 * PCAM [4]     16  PORT    PPI[4]  ENC2_A  PORT    PF4         FDO[4]                  Port,PPI,FIFO
 * PCAM [3]     17  PORT    PPI[3]  ENC1_B  PORT    PF3         FDO[3]      RESET*      Port,PPI,FIFO
 * PCAM [2]     18  PORT    PPI[2]  ENC1_A  PORT    PF2         FDO[2]      STDBY*      Port,PPI,FIFO
 * RESET        19                                                                      Active low, system reset
 * STDBY        20  AUXIN           PORT                                                Multi purpose bit port
 * PCAM [1]     21  PORT    PPI[1]  ENC0_B  PORT    PF1         FDO[1]                  Port,PPI,FIFO
 * PCAM [0]     22  PORT    PPI[0]  ENC0_A  PORT    PF0         FDO[0]                  Port,PPI,FIFO
 *
 * RESET* and STDBY* is the output port used with this function.
 *

Camera Port - Socket settings

 * Signals description for available camera modules
 *
 *              JP3 2-3                     JP3 2-3                     JP3 2-3
 *              SOCK-1                      SOCK-2                      SOCK-3                      SOCK-4*
 *      +3.3    1   2   GND         +3.3    1   2   GND         +3.3    1   2   GND         +3.3/5  1   2   GND
 *      SCL     3   4   SDA         SCL     3   4   SDA         SCL     3   4   SDA         SCL     3   4   SDA
 *      VSYNC   5   6   HSYNC       VSYNC   5   6   HSYNC       VSYNC   5   6   HSYNC       VSYNC   5   6   HSYNC
 *      PIXCLK  7   8   XCLK        PIXCLK  7   8   XCLK        PIXCLK  7   8   XCLK        PIXCLK  7   8   XCLK
 *      D7      9   10  D6          D9      9   10  D8          D9      9   10  D8          D11     9   10  D10
 *      D5      11  12  D4          D7      11  12  D6          D7      11  12  D6          D9      11  12  D8
 *      D3      13  14  D2          D5      13  14  D4          D5      13  14  D4          D7      13  14  D6
 *      D1      15  16  D0          D3      15  16  D2          D3      15  16  D2          D5      15  16  D4
 *      RESET   17  18  STDBY       RESET   17  18  STDBY       D1      17  18  D0          D3      17  18  D2
 *                                  D1      19  20  D0          RESET   19  20  STDBY       RESET   19  20  STDBY
 *                                                              TRIGGER 21  22  STROBE      D1      21  22  D0
 *
 * SOCK-4 - Is the standard for SharkDuino+ with +5V supply (JP3 close 1-2)
 *

PX Port - Signals and functions

 * PX port (Y12) signals description
 *
 *      SIGNAL  PIN     OUTPUT1     FUNCTION1   FUNCTION2   FUNCTION3   INPUT1  INPUT FUN1  INPUT FUN2  INPUT FUN3
 *      PX0     1       PORT        PLLCLK      PLLCLK      PLLCLK      PORT    EVENT       ENC0_A
 *      PX1     2       PORT        TB0_1*      TB0_1*      TB0_1*      PORT    EVENT       ENC0_B
 *      PX2     3       PORT        TB0_2       TB0_2       TB0_2       PORT    EVENT       ENC1_A
 *      PX3     4       PORT        TB1_1*      TB1_1*      TB1_1*      PORT    EVENT       ENC1_B
 *      PX4     5       PORT        TB1_2       TB1_2       TB1_2       PORT    EVENT       ENC2_A
 *      PX5     6       PORT        250KHz      500KHz      2.5MHz      PORT    EVENT       ENC2_B
 *      PX6     7       PORT        1KHz        10KHz       100KHz      PORT    EVENT       ENC3_A      ENC0_Z
 *      PX7     8       PORT        200KHz*     1MHz*       5MHz*       PORT    EVENT       ENC3_B      ENC1_Z
 *
 * (*) Asymmetrical clock
 *

Define Documentation

#define FPGA_DATA   (*((volatile unsigned char *) 0x20100000))
 

#define FPGA_RADD   (*((volatile unsigned char *) 0x20100002))
 

Enumeration Type Documentation

enum CameraSocket
 

Enumeration values:
SOCK_1  8bit bus 18 pin
SOCK_2  10bit bus 22 pin
SOCK_3  10bit bus 20 pin
SOCK_4  12bit bus 22 pin
SOCK_5  10bit Tiziano camera

enum EncoderClock
 

Enumeration values:
E_250KHz  Encoder time base is set to 250KHz.
E_500KHz  Encoder time base is set to 500KHz.
E_2_5MHZ  Encoder time base is set to 2.5MHz.
E_25MHZ  Encoder time base is set to 25MHz.

enum EncoderInput
 

Enumeration values:
E_0_PCAM  Encoder 0, phases signals (A,B) source, PORTX or PCAM.
E_0_PORTX 
E_1_PCAM  Encoder 1, phases signals (A,B) source, PORTX or PCAM.
E_1_PORTX 
E_2_PCAM  Encoder 2, phases signals (A,B) source, PORTX or PCAM.
E_2_PORTX 
E_3_PCAM  Encoder 3, phases signals (A,B) source, PORTX or PCAM.
E_3_PORTX 

enum Encoders
 

Enumeration values:
ENCODER_0  Identifier for the encoder 0.
ENCODER_1  Identifier for the encoder 1.
ENCODER_2  Identifier for the encoder 2.
ENCODER_3  Identifier for the encoder 3.

enum EncoderZeroEnable
 

Enumeration values:
E_0_ZERO  Enable ZERO signal input on encoder 0.
E_1_ZERO  Enable ZERO signal input on encoder 1.
E_23_ZERO  Enable ZERO signal input on encoder 2 and 3.

enum EncoderZeroInput
 

Enumeration values:
E_0_ZERO_PORTX  Encoder 0, select ZERO input signal source, PORTX or PCAM.
E_0_ZERO_PCAM 
E_1_ZERO_PORTX  Encoder 1, select ZERO input signal source, PORTX or PCAM.
E_1_ZERO_PCAM 

enum EventFunctions
 

Enumeration values:
EVF_COUNTER  Event counter.
EVF_FREQUENCY  Frequency meter.
EVF_PULSEMEASURE  Pulse width measure.

enum EventInput
 

Enumeration values:
EI_PX_0  Event in on PX[0].
EI_PX_1  Event in on PX[1].
EI_PX_2  Event in on PX[2].
EI_PX_3  Event in on PX[3].
EI_PX_4  Event in on PX[4].
EI_PX_5  Event in on PX[5].
EI_PX_6  Event in on PX[6].
EI_PX_7  Event in on PX[7].
EI_PCAM_0  Event in on PCAM[0].
EI_PCAM_1  Event in on PCAM[1].
EI_PCAM_2  Event in on PCAM[2].
EI_PCAM_3  Event in on PCAM[3].
EI_PCAM_4  Event in on PCAM[4].
EI_PCAM_5  Event in on PCAM[5].
EI_PCAM_6  Event in on PCAM[6].
EI_PCAM_7  Event in on PCAM[7].

enum FpgaRegisterAddress
 

Enumeration values:
FPGA_PA  0 n: PLL clock prescaler
FPGA_PB  1 m: PLL clock multiplier
FPGA_PC  2 u: PLL clock divider
FPGA_PD  3 PLL filter
FPGA_PE  4 PLL controls, CLK,SHIFT,ENABLE,CLEAR
FPGA_PF  5 PPI[7:0] Direction, 0 = PPI is an output, 1 = PPI is an input
FPGA_PG  6 PPI[11:8] Direction, 0 = PPI is an output, 1 = PPI is an input
FPGA_PH  7 SPI controls
FPGA_PI  8 Timer 16bit 0,1 signal controls
FPGA_PK  9 LSB count timer 0
FPGA_PL  10 MSB count timer 0
FPGA_PM  11 LSB count timer 1
FPGA_PN  12 MSB count timer 1
FPGA_PO  13 Encoder controls
FPGA_PP  14 Encoder controls
FPGA_PQ  15 Event counter input
FPGA_PX_DATA  16 PX port data output
FPGA_PX_DIR  17 PX port direction
FPGA_PX_FUNL  18 PX port function selection bit [3:0]
FPGA_PX_FUNH  19 PX port function selection bit [7:4]
FPGA_CPL_DATA  20 PCAM port low data output
FPGA_CPL_DIR  21 PCAM port low direction
FPGA_CPL_FUNL  22 PCAM port low function selection bit [3:0]
FPGA_CPL_FUNH  23 PCAM port low function selection bit [7:4]
FPGA_CPH_DATA  24 PCAM port high data output
FPGA_CPH_DIR  25 PCAM port high direction
FPGA_CPH_FUNL  26 PCAM port high function selection bit [3:0]
FPGA_CPH_FUNH  27 PCAM port high function selection bit [7:4]
FPGA_PR  28 Event counter controls
FPGA_PS  29 FIFO enable signals
FPGA_PT  30 Hidden port signals
FPGA_PU  31 Interrupt signal invert
FPGA_PV  32 FLASH controls
FPGA_AUX1  33 Reserved
FPGA_AUX2  34 Reserved
FPGA_AUX3  35 Reserved
FPGA_FIFO  36 FIFO address
FPGA_LB_ADD  37 Local bus address
FPGA_LB_DATA  38 Local bus data

enum HiddenPort
 

Enumeration values:
HP_STDBY_CTRL  Image sensor STANDBY output control.
HP_STDBY  Image sensor STANDBY.
HP_LCD_LED  LED backligth control bit.
HP_EXT_I2C  I2C external control bit.

enum InterruptSignals
 

Enumeration values:
IS_TOUCH  Touch screen interrupt.
IS_EXTINT  External interrupt.
IS_IMU  IMU interrupt.
IS_TRIGX  TRIGX interrupt.
IS_AUXIN  AUXIN interupt.

enum PortSettings
 

Enumeration values:
PD_OUTPUT  Set the port bit as output port.
PD_FUNC_1  Set the port bit as output with function 1.
PD_FUNC_2  Set the port bit as output with function 2.
PD_FUNC_3  Set the port bit as output with function 3.
PD_INPUT  Set the port bit as input port.

enum Timers
 

Enumeration values:
F_TIMER_0  Timer 0.
F_TIMER_1  Timer 1.

enum TimerTimeBase
 

Enumeration values:
TTB_1KHZ  1KHz
TTB_2_5MHZ  2.5MHz
TTB_PLLCLK  PLL Clock.
TTB_25MHZ  25MHz

Function Documentation

void FpgaEncoderClear (  U8  encoder  ) 
 

Parameters:
encoder Encoder identifier Encoders

S16 FpgaEncoderRead (  U8  encoder  ) 
 

Parameters:
encoder Encoder identifier Encoders
Returns:
Encoder counts in the range -32768 to +32767

void FpgaEncoderSetup (  U8  signalSource,
U8  timeBase,
U8  zeroSignals
) 
 

Parameters:
signalSource Selection of inputs for encoder phases A/B EncoderZeroInput and EncoderInput
timeBase Select the timebase for all encoder counters, see EncoderClock
zeroSignals Enable or disable the inputs for encoder signal ZERO. 
  FpgaEncoderSetup(E_0_PORTX | E_1_PORTX, E_2_5MHZ, 0);

void FpgaEventClearRead (   ) 
 

bool FpgaEventDone (   ) 
 

Returns:
true If done

void FpgaEventFunction (  U8  input,
U8  fun,
float  tb
) 
 

Parameters:
input Select the input of the event counter see EventInput
fun Select the desidered function, see EventFunctions
tb Time base, not usedfor EVF_COUNTER, specified as seconds for EVF_FREQUENCY and as ns for EVF_PULSEMEASURE. 
  FpgaEventFunction(EI_PX_0, EVF_FREQUENCY, 1);

void FpgaEventGate (  bool  ena  ) 
 

Parameters:
ena If true enable the counter else disable it.

U32 FpgaEventRead (   ) 
 

Returns:
Counter counts

void FpgaEventReset (   ) 
 

void FpgaEventSignalInvert (  bool  ena  ) 
 

Parameters:
ena If true invert the input signal.

void FpgaHiddenPort (  U8  value,
bool  ena
) 
 

Parameters:
value One or more bit of the port, see HiddenPort
ena If true enable selected signals else disable it

void FpgaInit (   ) 
 

void FpgaIntClear (   ) 
 

void FpgaIntEnable (  bool  ena  ) 
 

Parameters:
ena If true enable all interrupt sources

void FpgaInterruptSignals (  U8  bit,
bool  invert
) 
 

Parameters:
bit Interrupt line see InterruptSignals
invert Each bit if true invert related interrupt signal 
  FpgaInterruptSignals(IS_TOUCH, true);

U8 FpgaIntSource (   ) 
 

Returns:
Interrupt source:
Bit 0: Touch screen
Bit 1: Extint Y8.2
Bit 2: IMU - MPU9250 X21
Bit 3: TRIGX Y7.2
Bit 4: AUXIN Y11.20 and Y7.26

void FpgaLocalBusAddress (  U8  add  ) 
 

Parameters:
add Address value: 0 : 15

void FpgaLocalBusEnable (   ) 
  

 * Signals description of local bus on Y11
 *
 *      +3.3/5  1   2   GND
 *      SCL     3   4   SDA
 *      #WR     5   6   #RD
 *      UCLK    7   8   #CS
 *      A3      9   10  A2
 *      A1      11  12  A0
 *      D7      13  14  D6
 *      D5      15  16  D4
 *      D3      17  18  D2
 *      #RESET  19  20  STDBY
 *      D1      21  22  D0
 *
 * D[7:0] Data bus
 * A[3:0] Adrress bus
 * #WR Active low write clock
 * #RD Active low read clock
 * #CS Active low chip select
 * Achived performance range from 15 to 20 Mbyte/s
 *

U8 FpgaLocalBusRead (   ) 
 

Returns:
Data from bus

void FpgaLocalBusReadEnable (  bool  ena  ) 
 

Parameters:
ena True for read operations

void FpgaLocalBusWrite (  U8  data  ) 
 

Parameters:
data Value to write

U8 FpgaPCamhGet (   ) 
 

Returns:
What is present on the pin of this port.

void FpgaPCamhPut (  U8  dat  ) 
 

Parameters:
dat Data to be written

void FpgaPCamhSet (  U8  bit8,
U8  bit9,
U8  bit10,
U8  bit11,
U8  bit12,
U8  bit13,
U8  bit14,
U8  bit15
) 
 

Parameters:
bit8 Specify the active function.
bit9 Specify the active function.
bit10 Specify the active function.
bit11 Specify the active function.
bit12 Specify the active function.
bit13 Specify the active function.
bit14 Specify the active function.
bit15 Specify the active function.

U8 FpgaPCamlGet (   ) 
 

Returns:
What is present on the pin of this port.

void FpgaPCamlPut (  U8  dat  ) 
 

Parameters:
dat Data to be written

void FpgaPCamlSet (  U8  bit0,
U8  bit1,
U8  bit2,
U8  bit3,
U8  bit4,
U8  bit5,
U8  bit6,
U8  bit7
) 
 

Parameters:
bit0 Specify the active function.
bit1 Specify the active function.
bit2 Specify the active function.
bit3 Specify the active function.
bit4 Specify the active function.
bit5 Specify the active function.
bit6 Specify the active function.
bit7 Specify the active function.

float FpgaPllConfig (  int  n,
int  m,
int  u
) 
 

Parameters:
n PLL prescaler
m PLL multiplier, minimum value use 2
u PLL divider
Returns:
the output frequency as MHz

void FpgaPortPxSet (  U8  bit0,
U8  bit1,
U8  bit2,
U8  bit3,
U8  bit4,
U8  bit5,
U8  bit6,
U8  bit7
) 
 

Parameters:
bit0 Specify the active function.
bit1 Specify the active function.
bit2 Specify the active function.
bit3 Specify the active function.
bit4 Specify the active function.
bit5 Specify the active function.
bit6 Specify the active function.
bit7 Specify the active function.

U8 FpgaPxGet (   ) 
 

Returns:
What is present on the pin of this port.

void FpgaPxPut (  U8  dat  ) 
 

Parameters:
dat Data to be written

U16 FpgaRegRead (  int  reg  ) 
 

Parameters:
reg Register address FpgaRegisterAddress
Returns:
The register contents

void FpgaRegWrite (  int  reg,
U16  val
) 
 

Parameters:
reg Register address FpgaRegisterAddress
val Data to write in the register

void FpgaSenWrite (  U16  add,
U16  val
) 
 

Parameters:
add 9 bit address
val One or more bit of the port, see HiddenPort

void FpgaSetCamBus (  int  bus,
bool  mask10bit
) 
 

Parameters:
bus Selected camera bus see Camera Port - Socket settings
mask10bit If true mask (set to 0) bit 11:10

void FpgaSetCamBusWidth (  int  bus  ) 
 

Parameters:
bus Bus size, accepted value are 8,10,12

void FpgaSetPll (  int  n,
int  m,
int  u,
int  vco
) 
 

Parameters:
n Clock prescaler (7 bit)
m Clock multiplier (7 bit)
u Clock divider (5 bit)
vco PLL filter
See also:
FpgaPllConfig

void FpgaSpiSelect (  U8  sel  ) 
 

Parameters:
sel SPI address, range 7:0

void FpgaSpiWrite (  U8  val  ) 
 

Parameters:
val Byte to be written

void FpgaSpiWrite16 (  U16  val  ) 
 

Parameters:
val Word to be written

void FpgaTimerEnable (  U8  timer,
bool  ena
) 
 

Parameters:
timer Timer selection Timers
ena true enable selected timer

void FpgaTimerSet (  U8  timer,
U8  timeBase,
U16  count
) 
 

Parameters:
timer Timer selection Timers
timeBase Timer input clock see TimerTimeBase
count Timer divider
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