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Port G access and configuration shortcuts
[Parallel ports definitions]

Defines


Define Documentation

#define PPG   *pPORTGIO
 

Port G Data Registers.

#define PPG_CLR   *pPORTGIO_CLEAR
 

GPIO Clear Registers. Write 1 to clear related bit.

#define PPG_DIR   *pPORTGIO_DIR
 

For all bits, 0 - Input, 1 - Output.

#define PPG_EDG   *pPORTGIO_EDGE
 

For all bits, 0 - Level, 1 - Edge.

#define PPG_FER   *pPORTG_FER
 

For all bits, 0 - GPIO mode, 1 - Enable peripheral function.

#define PPG_INE   *pPORTGIO_INEN
 

For all bits, 0 - Input Buffer Disabled, 1 - Input Buffer Enabled.

#define PPG_MCA   *pPORTGIO_MASKA_CLEAR
 

For all bits, 1 - Clear.

#define PPG_MCB   *pPORTGIO_MASKB_CLEAR
 

For all bits, 1 - Clear.

#define PPG_MKA   *pPORTGIO_MASKA
 

For all bits, 1 - Enable, 0 - Disable.

#define PPG_MKB   *pPORTGIO_MASKB
 

For all bits, 1 - Enable, 0 - Disable.

#define PPG_MSA   *pPORTGIO_MASKA_SET
 

For all bits, 1 - Set.

#define PPG_MSB   *pPORTGIO_MASKB_SET
 

For all bits, 1 - Set.

#define PPG_MTA   *pPORTGIO_MASKA_TOGGLE
 

For all bits, 1 - Toggle.

#define PPG_MTB   *pPORTGIO_MASKB_TOGGLE
 

For all bits, 1 - Toggle.

#define PPG_MUX   *pPORTG_MUX
 

For all bit fields: 0 = Peripheral function, 1 = Alternate peripheral function.

#define PPG_POL   *pPORTGIO_POLAR
 

For all bits, 0 - Active high or rising edge, 1 - Active low or falling edge.

#define PPG_RSE   *pPORTGIO_BOTH
 

For all bits when enabled for edge-sensitivity, 0 - Single edge, 1 - Both edges.

#define PPG_SET   *pPORTGIO_SET
 

GPIO Set Registers. Write 1 to set related bit.

#define PPG_STC   *pPORTG_PADCTL
 

These registers configure hysteresis for the PORTx inputs.

For each controlled group of pins, b#0 will disable Schmitt triggering (hysteresis), while b#1 will enable it.

#define PPG_TGL   *pPORTGIO_TOGGLE
 

GPIO Toggle Registers. Write 1 to toggle related bit.


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