P1 OpCodes - Rev. 1.0.0 - 27 May 2010 - (C) 2010-2019 O.T., All Rights Reserved

AFFECTED FLAGS

BIT

INSTRUCTION

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13

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11

10

9

8

7

6

5

4

3

2

1

0

ASSEMBLY

DESCRIPTION

CY,Z

0

0

0

0

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

NOP

 Not Operation

CY,Z

0

0

0

1

0

0

0

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA + OPB + CY

 Add OPB to OPA with carry

CY,Z

0

0

0

1

0

0

0

1

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA + OPB

 Add OPB to OPA

CY,Z

0

0

0

1

0

0

1

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA - OPB - CY

 Sub OPB to OPA with carry

CY,Z

0

0

0

1

0

0

1

1

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA - OPB

 Sub OPB to OPA

CY,Z

0

0

0

1

0

1

0

0

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB--

 Dec OPB

CY,Z

0

0

0

1

0

1

0

1

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB++

 Inc OPB

CY,Z

0

0

0

1

0

1

1

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB < OPA < CY

 Shift left OPB OPA times  (CY > LSB)

CY,Z

0

0

0

1

0

1

1

1

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB < OPA

Shift left OPB OPA times (0 > LSB)

Z

0

0

0

1

1

0

0

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB & OPA

 OPA AND OPB

Z

0

0

0

1

1

0

1

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB | OPA

 OPA OR OPB

Z

0

0

0

1

1

1

0

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPB ^ OPA

 OPA XOR OPB

Z,LTE,GTE,NE,E,G,L

0

0

0

1

1

1

0

1

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

CMP OPA,OPB

 Compare OPA with OPB

Z

0

0

0

1

1

1

1

0

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA > OPB > CY

 Shift right OPB OPA times  (CY > LSB)

Z

0

0

0

1

1

1

1

1

OPB

OPB

OPB

OPB

OPA

OPA

OPA

OPA

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

A = OPA > OPB

 Shift right OPB OPA times (0 > LSB)

-

0

0

1

0

X

X

X

X

OPB

OPB

OPB

OPB

CC

CC

CC

CC

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

Jcc OPB/I

 Conditional or unconditional jump

-

0

0

1

1

X

R

R

R

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

R = OPB/I

 Copy to register R the OPB contents

-

0

1

0

0

X

0

0

0

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

WAIT = I

 Preset Long Wait State timer

-

0

1

0

0

X

0

0

1

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

FLUSHOUT

 Request an USB transfer for FIFO read

-

0

1

0

0

X

0

1

0

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

WAIT OPB/I

 Start Short Wait State

-

0

1

0

0

X

0

1

1

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

AUX = OPB/I

OPB contents to the AUX port

-

0

1

0

0

X

1

0

0

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

EA = OPB/I

 Set EA to the OPB contents

-

0

1

0

0

X

1

0

1

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

EB = OPB/I

 Set EB to the OPB contents

-

0

1

0

0

X

1

1

0

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

JOB OPB/I

Jump on bit flag

BIT

0

1

0

0

0

1

1

1

OPB

OPB

OPB

OPB

B

B

B

B

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

BTZ OPB,B

Test bit (0 is true) B on OPB

BIT

0

1

0

0

1

1

1

1

OPB

OPB

OPB

OPB

B

B

B

B

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

BTNZ OPB,B

Test bit (1 is true) B on OPB

-

0

1

0

1

X

P

P

P

OPB

OPB

OPB

OPB

M

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

P = OPB/I

Move to peripheral P the OPB contents

-

0

1

1

0

0

0

0

0

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

HALT

HALT the processor

-

0

1

1

0

0

0

0

1

OPB

OPB

OPB

OPB

POL

P

P

P

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

MATCH

 WAIT until MATCH condition is satisfied

-

0

1

1

0

0

0

1

0

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

MTCHBIT

 Bit enable for MATCH instruction

-

0

1

1

0

0

0

1

1

OPB

OPB

OPB

OPB

X

X

X

X

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

X/I

MTCHPOL

Bit polarity for MATCH instruction

 

 

 

 

 

 

 

OPA - OPB  Codes

A-B

ASSEMBLY

DESCRIPTION

0

0

0

0

R0

 Register 0

0

0

0

1

R1

 Register 1

0

0

1

0

R2

 Register 2

0

0

1

1

R3

 Register 3

0

1

0

0

R4

 Register 4

0

1

0

1

R5

 Register 5

0

1

1

0

R6

 Register 6

0

1

1

1

R7

 Register 7

1

0

0

0

A

 ALU register contents

1

0

0

1

FIFO

 FIFO data

1

0

1

0

P0

 Port 0

1

0

1

1

P1

 Port 1

1

1

0

0

P2

 Port 2

1

1

0

1

P3

 Port 3

1

1

1

0

nnnn

 Immediate value

1

1

1

1

EB

 External bus

CC Jump Conditional Codes

CC

FLAGS

ASSEMBLY

DESCRIPTION

0

0

0

0

NCY

JNC OPB

 Carry is 0

0

0

0

1

CY

JC OPB

 Carry is 1

0

0

1

0

L

JL OPB

 Less

0

0

1

1

G

JG OPB

 Greather

0

1

0

0

E

JE OPB

 Equal

0

1

0

1

NE

JNE OPB

 Not Equal

0

1

1

0

GTE

JGTE OPB

 Greather Than Equal

0

1

1

1

LTE

JLTE OPB

 Less Than Equal

1

0

0

0

NZ

JNZ OPB

 Not zero

1

0

0

1

Z

JZ OPB

 Zero

1

0

1

0

FE

JFE OPB

 FIFO empty

1

0

1

1

FF

JFF OPB

 FIFO full

1

1

0

0

TRUE

JMP OPB

 Absolute jump

1

1

0

1

NTXE

 

 Not FIFO empty

1

1

1

0

NRXE

 

Not FIFO full

1

1

1

1

FALSE

 

  

P Output Peripheral Codes

P

ASSEMBLY

DESCRIPTION

0

0

0

P0

 Port 0

0

0

1

P1

 Port 1

0

1

0

P2

 Port  2

0

1

1

P3

 Port  3

1

0

0

FIFO

 FIFO output

1

0

1

FIFO

 Read FIFO contents

 

R    R0:R7
B    0:15
X/I  Indifferent or Immediate value
X    Indifferent value (set to 0)
I    Immediate value
EA   External address
EB   External bus (data)
M    0=Toggle, 1=Set
POL  0=1 is true, 1=0 is true